In-Situ Investigations of Individual Nanowires within a FIB/SEM System

The move from planar CMOS-based microelectronics and advanced device structures like FinFETs and FD SOI structures to devices with 1-dimensional nanostructures (Si, Ge, III-V semiconductors) requires fundamental studies of nanostructures and innovative approaches to integrate the new materials and structures into microelectronic products. The approach of nanowire-devices for reconfigurable field effect transistors (RFETs) includes Schottky junctions that have to be designed and characterized.[1]. Due to their extraordinary physical properties, silicon nanowires have a great potential in application as nanoscale transistors and sensors. These future technologies and products provide new challenges to analytical techniques with high spatial resolution, particularly TEM and the respective sample preparation with minimal sample damage [2]. In this paper, we are presenting a nanoanalytical study of silicon nanowires which are completely surrounded by a gate oxide as well as Schottky barriers.